CPUs strike back: intel, photonics, and liquid cooling redraw the AI data center map

The integration of co-packaged silicon photonics into switch packages marks a pivotal innovation in AI data center networking, dramatically reducing component counts and power consumption while boosting resiliency and scalability. By relocating optical engines from external transceivers directly into the switch, power consumption in scale-out AI infrastructures can be cut by 3.5 times, enabling up to three times more GPUs within the same power budget. Complementing this optical advancement, liquid cooling technologies play a crucial role in increasing rack density, allowing more GPU ASICs to be interconnected over copper for scale-up workloads before transitioning to optics for longer-reach scale-out connectivity.

Addressing the volatile and intense power demands of AI workloads, which can fluctuate from 10% to 100% capacity within milliseconds, data centers are innovating with an 800-volt DC bus architecture that delivers power directly to racks. This approach eliminates multiple voltage conversions, enhancing efficiency in high-voltage power distribution and aligning with emerging grid capabilities. Alongside power delivery improvements, liquid cooling has become indispensable for managing the substantial thermal loads within AI racks, with companies claiming elegant solutions to meet these challenges.

By early 2026, liquid cooling has evolved from a niche solution to a fundamental requirement for next-generation AI servers, driven by escalating power and heat densities. Innovations showcased at events like GTC 2025, including liquid-cooled SSDs such as NVIDIA’s E1.S and fully liquid-cooled platforms like Vera Rubin, illustrate a comprehensive shift from traditional air cooling. This trend extends beyond CPUs to encompass memory and storage components, reflecting a holistic approach to thermal management essential for sustaining high-density AI infrastructure performance.

By late 2025, optical interconnects have emerged as the indispensable solution to surpass the physical and bandwidth constraints of traditional electrical cables in AI data centers, enabling speeds of 1.6 Tbps and 3.2 Tbps that are critical for scaling AI hardware performance. Lumentum, a leader in photonic components, exemplifies this trend with its record Q1 2025 revenue of $533 million driven by electro-absorption externally modulated lasers (EMLs) powering 800G and upcoming 1.6 Tbps interconnects. However, supply chain limitations on Indium Phosphide-based lasers have forced Lumentum to prioritize high-value customers, underscoring the intense demand and strategic importance of photonics in next-generation AI infrastructure.

Lumentum’s development of optical circuit switch (OCS) technology, which eliminates costly optical-electrical-optical conversions, is gaining momentum as a transformative innovation, particularly with its potential integration into Google’s TPU pods. This MEMS-based optical switching approach promises to revolutionize AI connectivity by drastically reducing latency and power consumption, attracting bullish investor interest as it signals a new paradigm in data center interconnect architecture.

Light Matter’s breakthrough photonic technology, announced in December 2025, dramatically expands GPU interconnectivity by enabling two chips to communicate over a single optical fiber using 16 colors of light, achieving an unprecedented 114 terabits per second bandwidth. This 8x improvement in data rates equates to the bandwidth capacity of over 100,000 homes, effectively addressing the massive connectivity demands of AI supercomputing and marking a pivotal leap forward in photonic AI chip innovation.

The convergence of transistor scaling limits, the AI boom since 2015, and commercial foundries’ adoption of silicon photonics has catalyzed industry-wide recognition of photonics as the future of AI connectivity. With major players like Nvidia entering the space, Light Matter’s pioneering efforts are now validated, enabling AI data centers to scale beyond the current 72-GPU communication ceiling to tens or hundreds of thousands of GPUs. This scaling not only facilitates the training of massive AI models with hundreds of trillions of parameters but also significantly boosts energy efficiency—critical as regions like Texas deploy 27 gigawatts of AI compute, where photonic networking effectively multiplies compute capacity and alleviates power grid strain.

By early 2026, CPUs have reemerged as critical players in AI workloads, particularly driven by the surge in agentic AI inference demands that require real-time reasoning and multi-step orchestration. Intel CEO Lip-Bu Tan and Amazon's Andy Jassy both emphasize that while GPUs remain essential for foundational model training, CPUs are increasingly indispensable as the orchestration and control plane for AI stacks, handling complex workflows, security, and integration tasks. This resurgence is reflected in shifting CPU-to-GPU ratios—from one CPU per eight GPUs to near parity in agentic workloads—signaling a fundamental shift in compute paradigms where CPUs complement rather than compete with GPUs.

The AI industry's 'inference inflection' marks a pivotal moment where inference compute, largely CPU-driven, has become a critical and previously undervalued resource essential for AI systems to think, reason, and generate outputs. NVIDIA’s Jensen Huang highlighted a 10,000-fold increase in compute needed for inference, while Intel and SemiAnalysis experts warn of underinvestment in CPUs over recent years, leading to potential shortages amid rising demand from reinforcement learning and agentic AI workloads. This dynamic has accelerated CPU utilization growth, compelling companies like Intel and AMD to expand CPU capabilities and market forecasts, with AMD projecting server CPU TAM growth exceeding 35% annually through 2030.

Responding to these evolving demands, industry leaders are championing heterogeneous AI architectures that integrate CPUs, GPUs, and specialized accelerators to optimize performance and scalability. Intel’s 2026 Computex unveiling of a 36,864-core rack-scale reference design exemplifies this shift, combining up to 128 high-core-count Xeon CPUs with massive DDR5 memory to tackle agentic AI inference at scale. Collaborations with SambaNova, Foxconn, Siemens, and Hitachi further illustrate a strategic move toward disaggregated inference architectures that offload tasks across CPUs, GPUs, and accelerators, boosting per-user token throughput by 2-3x and redefining AI infrastructure beyond GPU-centric models.

By early 2026, Intel had solidified its strategic positioning in AI infrastructure through multi-year partnerships with industry giants like Google and NVIDIA, with Google committing to deploy multiple generations of Intel Xeon processors including the latest Xeon 6 platform, and NVIDIA selecting Xeon 6 as the host CPU for its DGX Rubin NVL8 system. These collaborations underscore Intel’s role as the central orchestrator in advanced AI accelerator platforms, ensuring that despite the rise of GPU-centric models, Intel’s x86 architecture remains integral to AI compute ecosystems.

Intel’s partnership with SambaNova marks a pivotal move toward heterogeneous computing architectures that blend GPUs, SambaNova’s Reconfigurable Dataflow Units (RDUs), and Xeon processors to create scalable, modular AI infrastructure optimized for existing data centers. This approach emphasizes deployability and power efficiency, enabling faster AI inference performance—particularly for agentic AI workloads—without the need for specialized cooling or power setups, thereby addressing key industry demands for cost-effective, high-utilization AI systems.

Intel’s CEO Lip Bu Tan has highlighted a transformative shift in AI workload dynamics, with the CPU-to-GPU ratio evolving from one CPU per eight GPUs to potentially eight CPUs per GPU, driven by the rise of agentic AI and inference tasks that generate extensive CPU workloads. This paradigm shift is fueling Intel’s focus on CPU-centric AI infrastructure, as reflected in the launch of the Xeon 6+ processors—featuring up to 288 cores and significant gains in performance per watt—and the development of rack-scale reference designs integrating tens of thousands of Xeon cores within power-efficient envelopes to meet the demands of real-world AI workloads at scale.

Intel is advancing a comprehensive ecosystem strategy that tightly integrates compute, networking, and AI acceleration under the x86 architecture, positioning the CPU as the control plane responsible for storage, security, and system management in hybrid AI data centers. Collaborations with major OEMs such as ASUS, Dell, and HPE, alongside partners like Foxconn and Siemens, reinforce Intel’s commitment to delivering broadly available, cost-effective AI infrastructure solutions that address underutilization challenges and optimize workload orchestration through innovations like Application Energy Telemetry and the Crescent Island GPU optimized for agentic AI inference.

In mid-2026, Intel and Supermicro spearheaded a transformative leap in AI infrastructure with the launch of the Xeon 6+ platforms, featuring up to 288 efficiency cores per socket and 576 cores per server, as showcased at Computex 2026. These processors, built on Intel's advanced 18A process node and leveraging modular designs under Supermicro’s Data Center Building Block Solutions strategy, deliver up to 17% higher IPC, five times more last-level cache, and 25% faster memory support, specifically targeting dense, agentic AI workloads in cloud-native and hyperscale environments.

This launch marks a strategic pivot from traditional GPU-centric AI data centers toward CPU-centric, energy-efficient architectures. Intel positions the Xeon 6+ as the control plane for AI infrastructure, integrating 16 dedicated accelerators for cryptographic and data operations and emphasizing power efficiency with up to 45% better performance per thread per watt. Kira Boyko, Intel’s product line director, highlights the underutilization of GPUs due to insufficient CPU orchestration, underscoring the Xeon 6+’s role in optimizing workload orchestration and reducing total cost of ownership for throughput-intensive tasks like 5G analytics and virtualization.

The Xeon 6+ ecosystem rapidly gained traction among industry heavyweights such as ASUS, Dell Technologies, Ericsson, GIGABYTE, HPE, Lenovo, and Supermicro, who integrated these processors into their data center offerings with seamless socket compatibility to existing Xeon 6 systems. This broad adoption was complemented by Intel and partners unveiling rack-scale reference designs at Computex 2026, featuring up to 128 CPUs and an astonishing 36,864 cores within a 100kW power envelope, tailored for latency-sensitive agentic AI workloads and signaling a system-level orchestration approach over raw GPU training capacity.